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A compact 8-bit AES crypto-processor

Haghighizadeh, F ; Sharif University of Technology | 2010

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  1. Type of Document: Article
  2. DOI: 10.1109/ICCNT.2010.50
  3. Publisher: 2010
  4. Abstract:
  5. Advance Encryption Standard (AES), has received significant interest over the past decade due to its performance and security level. In this paper, we propose a compact 8-bit AES crypto-processor for area constrained and low power applications where both encryption and decryption is needed. The cycle count of the design is the least among previously reported 8-bit AES architectures and the throughput is 203 Mbps. The AES core consumes 5.6k gates in 0.18 μm standard-cell CMOS technology. The power consumption of the core is 49 μW/MHz at 128 MHz which is the minimum power reported thus far
  6. Keywords:
  7. AES ; ASIC ; Encryption ; Advance encryption standards ; CMOS technology ; Crypto-processor ; Cycle count ; Digital architecture ; Encryption and decryption ; Low power application ; Power Consumption ; Security level ; Standard-cell ; CMOS integrated circuits ; Computer networks ; Electric power supplies to apparatus ; Nanotechnology ; Network security ; Cryptography
  8. Source: 2nd International Conference on Computer and Network Technology, ICCNT 2010, 232010 through 25 April 2010 ; April , 2010 , Pages 71-75 ; 9780769540429 (ISBN)
  9. URL: http://ieeexplore.ieee.org/document/5474533