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A clock boosting scheme for low voltage circuits

Behradfar, A ; Sharif University of Technology | 2008

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  1. Type of Document: Article
  2. DOI: 10.1109/ICECS.2008.4674781
  3. Publisher: 2008
  4. Abstract:
  5. Limitations in operation of analog switches at very low voltages have caused many problems in design of these types of switched capacitor circuits and data converters. In this paper by modifying a recently proposed clock boosting circuit, we could obtain a new structure with better performance for very low voltage circuits. This method requires simpler digital circuits in comparison with previously reported structures, as well as less number of transistors and smaller chip area. This method can be used for sampling the full swing signals with supply voltages as low as 0.4 volt. © 2008 IEEE
  6. Keywords:
  7. Analog circuits ; Digital integrated circuits ; Networks (circuits) ; Analog switches ; Chip areas ; Clock boosting ; Clock boosting schemes ; Data converters ; Full swings ; Low voltages ; New structures ; Supply voltages ; Switched-capacitor circuits ; Very low voltages ; Digital circuits
  8. Source: 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008, St. Julian's, 31 August 2008 through 3 September 2008 ; 2008 , Pages 21-24 ; 9781424421824 (ISBN)
  9. URL: https://ieeexplore.ieee.org/document/4674781