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A 1.5V 8-bit low-power self-calibrating high-speed folding ADC

Movahedian, H ; Sharif University of Technology | 2005

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  1. Type of Document: Article
  2. DOI: 10.1109/RME.2005.1543002
  3. Publisher: 2005
  4. Abstract:
  5. An 8-bit High-speed folding/interpolating ADC is presented. Designed in 0.18μm CMOS technology, the ADC dissipates only 50mW from a single 1.5V supply. A novel technique based on using both N and P folding cells is used to widen the input range and a self-calibration technique based on using Trimmable MOSFETs is employed to improve the static and dynamic performance
  6. Keywords:
  7. Calibration ; CMOS integrated circuits ; MOSFET devices ; Dynamic performance ; Performance improvement ; Self calibration techniques ; Analog to digital conversion
  8. Source: 2005 PhD Research in Microelectronics and Electronics Conference, Lausanne, 25 July 2005 through 28 July 2005 ; Volume I , 2005 , Pages 33-36 ; 0780393457 (ISBN); 9780780393455 (ISBN)
  9. URL: https://ieeexplore.ieee.org/document/1543002