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    An accurate low-power DAC for SAR ADCs

    , Article 59th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2016, 16 October 2016 through 19 October 2016 ; 2017 ; 15483746 (ISSN); 9781509009169 (ISBN) Yazdani, S. B ; Khorami, A ; Sharifkhani, M ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2017
    Abstract
    A highly energy-efficiency switching procedure for the capacitor-splitting digital-To-Analog converter (DAC) is presented for successive approximation register (SAR) analogue-To-digital converters (ADCs). In this procedure, the MSB capacitor is divided into its binary constituents. All output digital bits, except the least significant bit (LSB), is determined using reference voltage (Vref), while the common-mode voltage (Vcm) is used to determine the LSB. Therefore, the precision of the proposed SAR ADC is independent of the precision of Vcm except in the LSB. This method reduces the area by 75% compared to the conventional binary weighted DAC and reduces the switching energy by 96.89%. ©... 

    An efficient fast switching procedure for stepwise capacitor chargers

    , Article IEEE Transactions on Very Large Scale Integration (VLSI) Systems ; Volume 25, Issue 2 , 2017 , Pages 705-713 ; 10638210 (ISSN) Khorami, A ; Sharifkhani, M ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2017
    Abstract
    A new low-power switching procedure for stepwise capacitor chargers is presented. In this procedure, a novel displacement method is utilized to improve the speed by a factor of two while preserving energy efficiency. Moreover, the load capacitor retains its charge after the charging process finishes and permits the circuit charge another predischarged load capacitor without an efficiency degradation problem (instability). Also, the control circuit of the switching procedure is implemented using only flip-flops with no combinational logic, therefore, it systematically prevents glitch power dissipation and improves the efficiency. Analytical derivations are proposed to model the switching... 

    General Characterization Method and a Fast Load-Charge-Preserving Switching Procedure for the Stepwise Adiabatic Circuits

    , Article IEEE Transactions on Circuits and Systems I: Regular Papers ; Volume 63, Issue 1 , 2016 , Pages 80-90 ; 15498328 (ISSN) Khorami, A ; Sharifkhani, M ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc 
    Abstract
    An analytical method is presented to characterize stepwise adiabatic circuits (SACs). In this method, the SACs are modeled as a discrete time system. Unlike previous methods, the stability is verified for arbitrary load capacitor ratios. Moreover, this method presents analytical derivations to offer an area/energy efficient design methodology. MATLAB simulations, post-layout simulations in the CMOS 0.18 μm technology, silicon measurements, and measurements based on discrete components confirm the precision of the analytical derivations. Using the proposed design methodology, a capacitive tank has been designed which reduces the energy consumption by 20% while the total size of the tank... 

    An efficient fast switching procedure for stepwise capacitor chargers

    , Article IEEE Transactions on Very Large Scale Integration (VLSI) Systems ; Volume PP, Issue 99 , 2016 ; 10638210 (ISSN) Khorami, A ; Sharifkhani, M ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc 
    Abstract
    A new low-power switching procedure for stepwise capacitor chargers is presented. In this procedure, a novel displacement method is utilized to improve the speed by a factor of two while preserving energy efficiency. Moreover, the load capacitor retains its charge after the charging process finishes and permits the circuit charge another predischarged load capacitor without an efficiency degradation problem (instability). Also, the control circuit of the switching procedure is implemented using only flip-flops with no combinational logic, therefore, it systematically prevents glitch power dissipation and improves the efficiency. Analytical derivations are proposed to model the switching...