Sharif Digital Repository

Low power consumption and high-reliability are often major objectives in the design of embedded systems. To reduce power consumption, embedded systems usually employ system-level power management techniques, e.g. Dynamic Voltage Scaling (DVS) and Dynamic Power Management (DPM). To achieve high reliability, embedded systems often exploit fault-tolerant techniques. Fault-tolerant techniques are in a trade-off with energy consumption, peak-power consumption, and temperature. Thus, different methods have been introduced that simultaneously consider reliability and power consumption as the system constraints. Several novel methods have been proposed in previous works to reduce the power... 

Multiprocessor systems have been widely used for the execution of parallel applications. Task scheduling is crucial for the right operation of multiprocessor systems, where the aim is shortening the length of schedules. Fault tolerance is becoming a necessary attribute in multiprocessor systems as the number of processing elements is getting larger. This paper presents a fault tolerant scheduling algorithm for task graph applications in multiprocessor systems. The algorithm is an extension of a previously proposed algorithm with a reduced communications scheme. Simulation results show the efficiency of the proposed algorithm despite its simplicity  

In this paper, using of fault tolerant techniques are studied and experimented in speech recognition systems to make these systems robust to noise. Recognizer redundancy is implemented to utilize the strengths of several recognition methods that each one has acceptable performance in a specific condition. Duplication-with-comparison and NMR methods are experimented with majority and plurality voting on a telephony Persian speech-enabled IVR system. Results of evaluations present two promising outcomes, first, it improves the performance considerably; second, it enables us to detect the outputs with low confidence. © 2008 IEEE  

In this paper, a new fully decentralized control strategy for the ALESTOM gasifier benchmark is presented. The proposed decentralized fault-tolerant control scheme overcomes the conventional drawbacks of the previously developed centralized strategies for the linearized model of gasifier system. To achieve the objective, first, the best pairing has been selected based on integrity screening tools as well as physical considerations. Then, a fully decentralized Proportional Integral (PI) controller has been proposed. Finally simulation results performed in MATLAB show that the designed controller is capable of achieving desired performance for three different scenarios, i.e., full, half and no... 

In this paper a new post fault operation strategy is proposed for modular multilevel converter (MMC). The conventional MMC fault tolerant operation methods use redundant cells in spinning or cold reserve schemes, however in this work the MMC fault tolerant operation is achieved without requiring any redundant cells. The introduced strategy modifies capacitors reference voltages and arms modulation reference waveforms in faulty leg of MMC while other legs operate normally. The applied technique leads to having some degree of overvoltage in faulty leg capacitors which could be neglected since the number of cells is high. Simple realization and significant economic savings would be attained as... 

Since the failure of resources fatally affects processor allocation, a fault tolerant service is essential in the interconnection networks. In this paper, a new fault tolerant method is proposed and evaluated in the hybrid processor allocation scheme, which we have introduced in our previous work. Our task consists of two independent phases. First, the allocation process executes to allocate an efficient set of processors to the requested submesh. The second phase comes to work when the faulty nodes are detected in the allocated spaces. The selected processor allocation scheme allows jobs to be executed without waiting, provided that the number of processors is sufficient in the system and... 

This paper presents a fault tolerant routing algorithm for the star graph. The algorithm is based on the concept of unsafely vectors originally proposed for binary n-cubes. Each node starts by computing a first level unsafety set,composed of the set of unreachable neighbours.It then performs some exchanges with its neighbours to determine the unsafety nodes.After that all of the nodes have the addresses of all faulty nodes. Based on the information gathered in each nodefault-tolearnt routing between a source node and a destination node is raelised  

This paper presents a fault injection tool, called SINJECT that supports several synthesizable and non-synthesizable fault models for dependability analysis of digital systems modeled by popular HDLs. The tool provides injection of transient and permanent faults into the Verilog as well as VHDL models of a digital circuit to study the fault behavior, fault propagation and fault coverage. Moreover, using specific simulators, the SINJECT provides a mixed-mode fault injection, i.e., fault injection into both Verilog and VHDL parts of a model, to achieve high description reality by Verilog and high capability modeling by VHDL. To demonstrate the tool, two case studies are evaluated: 1) an... 

Let P be a set of points in the plane, each equipped with a directional antenna that can cover a sector of angle α and range r. In the symmetric model of communication, two antennas u and v can communicate to each other, if and only if v lies in u’s coverage area and vice versa. In this paper, we introduce the concept of fault-tolerant spanners for directional antennas, which enables us to construct communication networks that retain their connectivity and spanning ratio even if a subset of antennas are removed from the network. We show how to orient the antennas with angle α and range r to obtain a k-fault-tolerant spanner for any positive integer k. For α ≥ π, we show that the range 13 for... 

This paper presents a unified passive–active fault-tolerant control strategy to compensate the loss of actuators’ effectiveness. The proposed approach is capable of handling the system in pre- and post-fault diagnosis intervals by passive and active approaches, respectively. The stability of the designed system is independent of the accuracy of information provided by the fault detection and diagnosis unit, however, a precise estimation could improve the conservation. Actuator saturation and L∞ disturbances effects are considered in the design stage. The trade-off between maximising the domain of attraction and minimising the effects of L∞ disturbances is tackled by developing a non-constant... 

This paper presents a unified passive–active fault-tolerant control strategy to compensate the loss of actuators’ effectiveness. The proposed approach is capable of handling the system in pre- and post-fault diagnosis intervals by passive and active approaches, respectively. The stability of the designed system is independent of the accuracy of information provided by the fault detection and diagnosis unit, however, a precise estimation could improve the conservation. Actuator saturation and L ∞ disturbances effects are considered in the design stage. The trade-off between maximising the domain of attraction and minimising the effects of L ∞ disturbances is tackled by developing a... 

In this paper, an FPGA-controlled fault tolerant back-to-back converter for DFIG-based wind energy conversion application is studied. Before an open-circuit failure in one of the semiconductors, the fault tolerant converter operates as a conventional back-to-back six-leg one. After the fault occurrence in one of the switches, the converter will continue its operation with the remaining five healthy legs. Design, implementation, simulation and experimental verification of a reconfigurable control strategy for the fault tolerant six/five leg converter used in wind energy conversion are discussed. The proposed reconfigurable control strategy allows the uninterrupted operation of the converter... 

Currently, some coarse measures like global network latency are used to compare routing protocols. These measures do not provide enough insight of traffic distribution among network nodes in the presence of different fault regions. This paper presents a detailed traffic analysis of fault-tolerant planar adaptive routing (FTPAR) algorithm achieved by an especially developed tool. Per-node traffic analysis illustrates the traffic hotspots caused by fault regions and provides a great assistance in developing fault tolerant routing algorithms. Based on such detailed information, a simple yet effective improvement of FTPAR is suggested. Moreover, the effect of a traffic hotspot on the traffic of... 

Fault tolerant operation of single-ended non-isolated DC-DC converters used in embedded and safety critical applications is mandatory to guaranty service continuity. This paper proposes a new, fast and efficient FPGA-based open and short-circuit switch fault diagnosis asssociated to fault tolerant converter topology. The results of Hardware-In-the-Loop and experimental tests are presented and discussed  

Continuity of service of wind energy conversion systems as well as their reliability and performances are some of the major concerns in this power generation area. Six-legs AC/DC/AC converters are normally used in modern wind energy systems like as in the system with a doubly-fed induction generator (DFIG). A sudden failure of the converter can lead to the total or partial loss of the control of the phase currents and can cause serious system malfunction or shutdown. Therefore, to prevent the spread of the fault to the other system components and to ensure continuity of service, fault tolerant converter topologies associated to quick and effective fault detection and compensation methods... 

In this paper, we present a novel routing algorithm in order to avoid deadlock and packet dropping. In our proposed algorithm the network-on-chip (NoC) is capable of tolerating faults in presence of control faults in combinational parts of routers. In addition, by modifying the functionality of the router, the router is enabled to test its own, as well as the preceding router's functionality based on the routing algorithm, destination address and previous router's situation. Each router recognizes the faulty neighbor and announces it to successive routers. In this scheme no extra packets will be generated. We analyze the effects of our method on latency, power consumption and drop rate. Our... 

As the semiconductor industry advances to the deep sub-micron and nano technology points, the on-chip components are more prone to the defects during manufacturing and faults during system operation. Consequently, fault tolerant techniques are essential to improve the yield of modern complex chips. We propose a fault-tolerant routing algorithm that keeps the negative effect of faulty components on the NoC power and performance as low as possible. Targeting intermittent faults, we achieve fault tolerance by employing a simple and fast mechanism composed of two processes: NoC monitoring and route adaption. Experimental results show the effectiveness of the proposed technique, in that it offers... 

In this paper the fault-Tolerant control problem for uncertain linear systems in the presence of L, disturbances and actuator saturation is studied. The conflict between enlarging the domain of attraction and attenuating the effect of L, disturbances is tackled by proposing a non-constant state feedback controller. The feedback gains are calculated off-line by using linear matrix inequalities. In addition, the proposed method is capable of tolerating time-varying faults. The suggested approach is implemented on a sample model and the result is compared with other works  

In this study, a new algorithm for explicit model predictive control of linear discrete-time systems subject to linear constraints, disturbances, uncertainties, and actuator faults is developed. The algorithm is based on dynamic programming, constraint rearrangement, multi-parametric programming, and a solution combination procedure. First of all, the dynamic programming is used to recast the problem as a multi-stage optimization problem. Afterwards, the constraints are rearranged in an innovative manner to take into account the worst admissible situation of unknown bounded disturbances, uncertainties, and actuator faults. Then, the explicit solution of the reformulated optimization problem... 

Performance of a data center is a function of three features; bandwidth, latency, and reliability. By adopting optical technology in data center network, bandwidth increment, in addition to reduction of transmission latency and power consumption, is achieved. Unfortunately, fault tolerance of the optical networks has raised less attention so far. So in this paper, we propose a fault-tolerant, scalable, and high-performance optical architecture built upon previously proposed O-TF network, with the goal of redundancy optimization and reducing the minimum number of wavelength channels required for non-blocking functionality of the network. Moreover, reducing network diameter, in O-FTF network...