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After publication of this article [1], it was brought to our attention that there are some errors in the section of 'Authors' contributions'. The correct Authors' contributions should be: MK, FS, and AG collected literature, designed and wrote the manuscript. FS and MM edited and prepared the manuscript for submission. All authors read and approved the final manuscript. © 2019 The Author(s)  

A potential peculiarity of software systems is that a large number of soft-errors are inherently derated (masked) at the software level. The rate of error-deration may depend on the type of algorithms and data structures used in the software. This paper investigates the effects of the underlying algorithms of programs on the rate of error-deration. Eight different benchmark programs were used in the study; each of them was implemented by four different algorithms, i.e. divide-and-conquer, dynamic, backtracking and branch-and-bound. About 10,000 errors were injected into each program in order to quantify and analyze the error-derating capabilities of different algorithm-designing- techniques.... 

With the emerging nanoscale CMOS technology, Multiple Event Transients (METs) originated from radiation strikes are expected to become more frequent than Single Event Transients (SETs). In this paper, a fast and accurate layout- based Soft Error Rate (SER) estimation technique with consideration of both SET and MET fault models is pro- posed. Unlike previous techniques in which the adjacent MET sites are obtained from logic-level netlist, we perform a comprehensive layout analysis to extract MET adjacent cells. It is shown that layout-based technique is the only effective solution for identification of adjacent cells as netlist-based techniques significantly underestimate the overall SER.... 

Inaccuracies in workpiece location lead to errors in position and orientation of machined features on the workpiece, and strongly affect the assemblability and the quality of the product. The accurate positioning of workpiece on a fixture is influenced by rigid body displacements and rotations of the workpiece due to several errors (e.g. geometric radial and position errors in locators and manufacturing tolerances of the workpiece). In this paper, an efficient approach is introduced for analysis and compensation errors in the workpiece-fixture-cutting tool system. A new mathematical formulation of workpiece-fixture modelling is proposed to establish the relationship between the locating... 

Nowadays, the use of multimedia services such as video sequences is constantly growing. Unfortunately, due to the lack of reliable communication channels and video data sensitivity to transmission errors, the quality of received video might decrease. Therefore, decoder error concealment methods have been developed to retrieve the damaged or lost data. In this paper, a novel temporal error concealment (TEC) algorithm based on moment invariants is presented. It includes three main stages of: designation of candidate motion vectors (MVs) set, adaptive determination of block size in the current and reference frames for feature extraction, and error function calculation based on moment... 

MEMS-IMUs have an extensive application in multifarious studies, as well as industrial and commercial areas. It is crucial to diminish their intrinsic errors in a suitable calibration procedure. In this paper, a novel calibration procedure was proposed for Inertial Measurement Units (IMUs) on a turntable. A general nonlinear model of the IMU output including the effects of bias, scale factor, misalignment, and lever arm was derived. Transformed Unscented Kalman Filter (TUKF) was utilized to perform the estimation of error parameters for gyroscopes and accelerometers. The calibration maneuvers were applied using a tri-axis turntable to create input signals. In addition, assuming the sensors... 

Some of the recent approaches regarding leverage PCM will be reviewed in this chapter. The chapter starts with a discussion regarding future main memory systems that includes hybrid architecture schemes using both PCM and DRAM arrays. Later, we focus on PCM only approaches and this section will help describe some techniques for reducing the increased read latency because of slow writes in PCMs. In this chapter, we also illustrate wear-leveling approaches and review the security problems of this memory approach which are lifetime limited. This section includes an overview of the recent security aware wear-leveling techniques, whose methods help detect attacks, and their issues during the... 

In this paper, we propose an algorithm to determine the active sliding mode controller parameters in synchronizing different chaotic systems. The resulted control parameters not only secure stability of the error systems, they can also be adjusted to obtain the desired rate of error convergence. Numerical simulations are presented to evaluate effectiveness of the proposed algorithm where the Lü system is implemented as the response (slave) system. © 2005 Elsevier Ltd. All rights reserved  

An algorithm is proposed for description of error accumulation during assembly process of planar truss structures. Specifically, given the tolerances of pre-fabricated members, the uncertainty in the position of nodes is calculated in terms of variances and covariances. Twoconstituent elements of planar trusses (i.e. two-bar unit cell and redundant member) are formulated based on linear models of kinematics and deformation mechanics. Subsequently, these models are combined together in a single algorithm to construct a suitable procedure for estimation of uncertainty zone of each node. Accuracy of the developed method is verified by comparing its results with outcomes of Monte Carlo... 

Evaluating the statistical dimension is a common tool to determine the asymptotic phase transition in compressed sensing problems with Gaussian ensemble. Unfortunately, the exact evaluation of the statistical dimension is very difficult and it has become standard to replace it with an upper-bound. To ensure that this technique is suitable, [1] has introduced an upper-bound on the gap between the statistical dimension and its approximation. In this work, we first show that the error bound in [1] in some low-dimensional models such as total variation and ell _{1} analysis minimization becomes poorly large. Next, we develop a new error bound which significantly improves the estimation gap... 

Tag array in on-chip caches is one of the most vulnerable components to radiation-induced soft errors. Protecting the tag array in some processors is limited to error detection using the parity check, since the overheads of error correcting codes are not affordable in this component. State-of-The-Art tag protection schemes combine the parity check with replication to provide error correction capability. Classifying these replication-based schemes into partial-replication and full-replication, the former offers a low overhead protection in which a large fraction of detectable errors remain uncorrectable, whereas the latter imposes a significant overhead to correct all of the errors. This... 

This paper presents a soft error-tolerant architecture to protect embedded processors register files. The proposed architecture is based on selectively duplication of the most vulnerable registers values in a cache memory embedded beside the processor register file so called register cache. To do this, two parity bits are added to each register of the processor to detect up to three contiguous errors. To recover the erroneous register value, two distinct cache memories are utilized for storing the redundant copy of the vulnerable registers, one for short lived registers and the other one for long lived registers. The proposed method has two key advantageous as compared to fully ECC protected... 

This paper investigates the performance of a MOS track-and-hold circuit as the front end of a wide input range and high-speed single-sided ADC. In order to reduce charge injection and clock feedthrough errors, a new technique for employing a dummy transistor in the bootstrapped switch of the track and hold circuit is introduced. Performance of the proposed circuit for the two cases of constant and non-linear hold capacitor is studied. It is also shown that how and when dummy switch and bulk switching method can improve the accuracy of theT/H. © IEICE 2007  

Three-axis rotary table is a flight motion simulator (FMS) used in the hardware in the loop (HWIL) simulation. Geometrical Modeling of 3-axis rotary tables is described and then three possible Geometrical layouts are driven. Kinematic and dynamic modelings of a 3-axis rotary table are developed in this paper. Denavit-Hartenberg (D-H) method, Recursive Newton-Euler (RNE) and Lagrange methods are used, respectively, in kinematic and dynamic modeling. A kinematic Error analysis is applied to determine the orientation and position accuracy of the table. Dynamic sensitivity analysis is also performed and the first-order sensitivity functions are derived corresponding several dynamic and control... 

The capturing of localized plastic deformation in a Finite-element analysis is difficult as discontinuities of displacement occur and these are generally precluded in a standard displacement analysis. In this paper, an adaptive mixed finite element model is presented in the modelling of strain localization due to material instability. An h-adaptive analysis using element elongation is applied to study the prediction of localization phenomenon and evaluate the ultimate capacity of material. A remeshing strategy is employed to compute the distribution of required element size using the estimated error distribution. Once the new element size and its alignment have been indicated, an automated... 

In this paper the robustness of network synchronizability against random deletion of nodes, i.e. errors, in dynamical scale-free networks was studied. To this end, two measures of network synchronizability, namely, the eigenratio of the Laplacian and the order parameter quantifying the degree of phase synchrony were adopted, and the synchronizability robustness on preferential attachment scale-free graphs was investigated. The findings revealed that as the network size decreases, the robustness of its synchronizability against random removal of nodes declines, i.e. the more the number of randomly removed nodes from the network, the worse its synchronizability. We also showed that this... 

Cache memories constitute a large fraction of processor chip area and are highly vulnerable to soft errors caused by energetic particles. To protect these memories, most of the modern processors employ Error Detection Codes (EDCs) or Error Correction Codes (ECCs). EDCs/ECCs impose significant overheads in terms of area and energy; these overheads increase as a function of interleaving EDCs/ECCs to detect/correct multiple errors. This paper proposes a new cache architecture to minimize the area and energy overheads of EDCs/ECCs in set-associative L1-caches. Simulation results for a 4-way set-associative cache show that the proposed architecture reduces both the area and static power overheads... 

Determining an object location in a specific region is an important task in many machine vision applications. Different parameters affect the accuracy of the localization process. The quantization process in charge-coupled device of a camera is one of the sources of error that causes estimation rather than identifying the exact position of the observed object. A cluster of points, in the field of view of a camera are mapped into a pixel. These points form an uncertainty region. In this paper, we present a geometrical model to analyze the volume of this uncertainty region as a criterion for object localization error. The proposed approach models the field of view of each pixel as an oblique...