Sharif Digital Repository

As the infrastructure-centric model of peer-to-peer streaming, recent overlay construction schemes compose a hierarchical topology of peers by grouping them into clusters. There is a server in each cluster that receives data from the source and relays it to its cluster members. In this paper, we propose an alternative infrastructure-centric peer-to-peer framework called BAHMO that constructs a hierarchical multicast tree. BAHMO does not utilize server bandwidth and rely only on peer bandwidth for data transfers. It achieves both the stability of the infrastructure-centric model and the bandwidth efficiency of the fully-distributed model. Bandwidth assignment for inter-cluster data transfers... 

In this paper, we introduce a new class of interconnection networks for multiprocessor systems which we refer to as Stretched-Hypercubes, or shortly the Stretched-Cube networks. These networks are obtained by replacing an edge of the well-known hypercube network with an array of processors. Two interesting features of the proposed topology are its area-efficient VLSI layout and superior scalability over the traditional hypercube network. Some topological properties of the proposed network are studied. In addition, an area-efficient VLSI layout for the stretched-cube is suggested and some comparisons between the proposed network and previously studied networks such as the star and hypercube... 

The star graph, as an interesting network topology, has been extensively studied in the past. In this paper, we address some of the combinatorial properties of the star graph. In particular, we consider the problem of calculating the surface area of the star graph, answering an open problem previously posed in [12]. © 2005 IEEE  

High reliability, low power consumption and high performance are key objectives in the design of NoCs. These three design objectives should be considered simultaneously in order to have an optimal design. This paper proposes a method to reduce power consumption of an application specific NoC. This is done in two steps: 1) Extra virtual channels are used in the router architecture to increase the performance in an application specific NoC, and 2) The amount of the performance gain is then set to the initial point using frequency scaling technique, hence reducing the power consumption, without corruption of reliability. The simulation results show that the method can reduce the power... 

Technology scaling increases clock rates and die sizes; therefore, power dissipation is predicted to soon become the key limiting factor on the performance of single-chip designs. NoC as an efficient and scalable on-chip communication architecture for SoC architectures, enables integration of a large number of computational and storage blocks on a single chip. Since different applications impose different traffic models to the network, in this paper we will analyze the power and energy consumption of the most popular traffic models, i.e., Uniform, Local, HotSpot and First Matrix Transpose, in two famous and well designed topologies, mesh and torus. We will also compare these topologies with... 

Most of previous studies have assessed the performance issues for regular buffer and virtual channel organiza-tions and have not considered overall buffer size constraint. In this paper, the performance of mesh-based interconnection networks (mesh, torus and hypercube networks) under different traffic patterns (uniform, hotspot, and matrix-transpose) is studied. We investigate the effect of the number of virtual channels and their buffer lengths, on the performance of these topologies when the total buffer size associated to each physical channel (and thus router buffer size) is fixed.The results show that the optimal number of virtual channels and buffer length highly depends on the traffic... 

Networks on chip (NoC) have been proposed as a solution to mitigate complex on-chip communication problems. NoCs are composed of intellectual properties (IP) which are interconnected by on-chip switching fabrics. A step in the design process of NoCs is hardware virtualization which is mapping the IP cores onto the tiles of a chip. The communication among the IP cores greatly affects the performance and power consumption of NoCs which itself is deeply related to the placement of IPs onto the tiles of the network. Different mapping algorithms have been proposed for NoCs which allocate a set of IPs to given network topologies. In these mapping algorithms, there is a restriction which limits IPs... 

Recommender systems have become an important issue in network science. Collaborative filtering and its variants are the most widely used approaches for building recommender systems, which have received great attention in both academia and industry. In this paper, we studied the relationship between recommender systems and connectivity of users-items bipartite network. This results in a novel recommendation algorithm. In our method recommended items are selected based on the eigenvector corresponding to the algebraic connectivity of the graph - the second smallest eigenvalue of the Laplacian matrix. Since recommending an item to a user equals to adding a new link to the users-items bipartite... 

In this paper an analytical formulation based on the conversion matrix approach for characterizing the oscillator noise spectra as well as the phase and amplitude noise spectra for a single-loop optoelectronic oscillator (OEO) is presented. The validity of this approach is verified by comparing our results regarding the noise spectra of the OEO against the results of two references in the literature. The first reference presents simulation results, and the second reference presents both simulation and measurement results, and good agreement is seen between the results of the new method and those of the references. The advantage of the new approach is the simplicity of the theory as well as... 

The main contribution of this paper is to introduce a novel non-Lipschitz protocol that guarantees consensus in finite-time domain. Its convergence in networks with both unidirectional and bidirectional links is investigated via Lyapunov Theorem approach. It is also proved that final agreement value is equal to average of agents' states for the bidirectional communication case. In addition effects of communication time-delay on stability are assessed and two other continuous Lipschitz protocols are also analyzed  

In this paper, a parallel algorithm is presented for data clustering on a multicomputer with star topology. This algorithm is fast and requires a small amount of memory per processing element, which makes it even suitable for SIMD implementation. The proposed parallel algorithm completes in O(K+S2-T2) steps for a clustering problem of N data patterns with M features per pattern and K clusters where S and T are the minimum numbers such that NM≤S! and KM≤T!, on the S-dimensional star graph  

The star graph, as an interesting network topology, has been extensively studied in the past. In this paper, we address some of the combinatorial properties of the star graph. In particular, we consider the problem of calculating the surface area and volume of the star graph, and thus answering an open problem previously posed in the literature. The surface area of a sphere with radius i in a graph is the number of nodes in the graph whose distance from a given node is exactly i. The volume of a sphere with radius i in a graph is the number of nodes within distance i from the given node. In this paper, we derive explicit expressions to calculate the surface area and volume in the star graph.... 

Network-on-Chips (NoCs) usually use regular mesh-based topologies.Regular mesh topologies are not always efficient because of power and area constraints which should be considered in designing system-on-chips.To overcome this problem,irregular mesh NoCs are used for which the design of routing algorithms is an important issue.This paper presents a novel routing algorithm for irregular mesh-based NoCs called "i-route". In contrast to other routing algorithms,this algorithm can be implemented on any arbitrary irregular mesh NoC without any change in the place of IPs. In this algorithm, messages are routed using only 2 classes of virtual channels. Simulation results show that using only 2... 

During the recent years, 2D mesh network-onchip has attracted much attention due to its suitability for VLSI implementation. The 2-dimensional de Bruijn topology for network-on-chip is introduced in this paper as an attractive alternative to the popular simple 2D mesh NoC. Its cost is equal to that of the simple 2D mesh but it has a logarithmic diameter. We compare the proposed network and the popular mesh network in terms of power consumption and network performance. Compared to the equal sized simple mesh NoC, the proposed de Bruijn-based network has better performance while consuming less energy. © 2008 IEEE  

The utilization of the limited resources of a multiprocessor or multicomputer system is a primary performance issue crucial for the design of many scheduling algorithms. While many of the existing parallel machines benefit from a regular product network topology, almost none of the previous resource placement techniques have come to recognize and exploit this Inherent regularity. This paper introduces some novel algorithms for deriving resource placement schemes in product networks based on the assumed perfect resource placement in their underling basic graphs. © 2007 IEEE  

NoC is an efficient on-chip communication architecture for SoC architectures. It enables integration of a large number of computational and storage blocks on a single chip. NoCs have tackled the SoCs disadvantages and are scalable. In this paper, we compare two popular NoC topologies, i.e., mesh and torus, in terms of different figures of merit e.g., latency, power consumption, and power/throughput ratio under different routing algorithms and two common traffic models, uniform and hotspot. To the best of our knowledge, this is the first effort in comparing mesh and torus topologies under different routing algorithms and traffic models with respect to their performance and power consumption.... 

In overlay networks, the mechanism of a peer randomly joining and leaving a network, causes a topology mismatch between the overlay and the underlying physical topology. This causes a large volume of redundant traffic in the underlying physical network as well as an extra delay in message delivery in the overlay network. Topology mismatch occurs because overlay networks are not aware of their underlying physical networks. In this paper we present a mathematical model for topology awareness of overlay networks (degree of matching between an overlay and its underlying physical network) and the efficiency of message delivery on them. Then we experimentally show that the model is precise in the... 

In this paper, a new 1/4 rate clock linear phase detector (PD) structure for PLL-based clock and data recovery (CDR) circuits will be suggested. The proposed topology offers a more suitable PD for high speed applications compared to the conventional topologies. The effect of duty cycle variation on the operation of CDR has been also studied. Designed in a 0.18μm CMOS technology, the proposed PD consumes 16mA from a 1.8V voltage supply. © 2006 IEEE  

Hypermesh is a promising network topology and is suitable for a range of network-based computing systems. Although there are few models reported for hypermeshes with uniform traffic pattern, no analytical model has been reported to deal with hot-spot traffic. Since many parallel applications exhibit non-uniform traffic patterns such as hot-spots, uniform traffic assumption is not always justifiable in practice. In this study, we propose a new analytical model to predict the mean message latency in wormhole-switched hypermeshes in the presence of hot-spot traffic. The proposed model can also calculate the mean latency under uniform traffic load when the hot-spot ratio is set to zero.... 

The utilization of the limited resources of a multiprocessor or multicomputer system is a primary performance issue which is crucial for the design of many scheduling algorithms. While many of the existing parallel machines benefit from a regular product network topology, almost none of the previous resource placement techniques have come to recognize and exploit this inherent regularity. This paper introduces several novel algorithms for deriving resource placement schemes in product networks based on the assumption of perfect resource placement in their underling basic graphs. Our techniques use known schemes for the basic networks as their building blocks for deploying the resource...