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    RI-COTS: trading performance for reliability improvements in commercial of the shelf systems

    , Article 19th International Symposium on Computer Architecture and Digital Systems, CADS 2017, 21 December 2017 through 22 December 2017 ; Volume 2018-January , March , 2018 , Pages 1-6 ; 9781538643792 (ISBN) Ghasemi, G ; Hosseini Monazzah, A. M ; Farbeh, H ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2018
    Abstract
    The flexibility of software-based fault tolerant approaches in providing the required level of reliability Commer-cial-Off-The Shelf (COTS) devices made them the first choice in designing safety-critical systems. In this paper, we propose a reliability improvement method for COTS-based systems, so-called, RI-COTS. The main idea behind RI-COTS is to establish a tradeoff between reliability and performance of COTS system through controlling redundant execution at instruction level. RI-COTS is implemented on LEON2 processor VHDL model. Our simulation results show that comparing with the most related studies, RI-COTS can improve the fault detection capability by 20% with only 4% performance... 

    REALISM: Reliability-aware energy management in multi-level mixed-criticality systems with service level degradation

    , Article Journal of Systems Architecture ; Volume 117 , 2021 ; 13837621 (ISSN) Sobhani, H ; Safari, S ; Saber Latibari, J ; Hessabi, S ; Sharif University of Technology
    Elsevier B.V  2021
    Abstract
    Mixed-criticality embedded systems, as the next-generation of safety-critical systems, are increasingly employed in the industry due to consolidating functionalities with varying criticality levels onto the same computing platform. Technology scaling, battery-supplied design, and heavy computation in mixed-criticality systems necessitate employing energy management techniques. Due to the degrading effects of these techniques on the system's reliability, minimizing energy consumption and meeting tasks’ timing constraints without sacrificing the reliability requirement is a vital challenge in designing mixed-criticality systems. In this paper, we propose REALISM; a novel Reliability- and... 

    Direct evidence for conformal invariance of avalanche frontiers in sandpile models

    , Article Physical Review E - Statistical, Nonlinear, and Soft Matter Physics ; Volume 79, Issue 3 , Volume 79, Issue 3 , 2009 ; 15393755 (ISSN) Saberi, A.A ; Moghimi-Araghi, S ; Dashti-Naserabadi, H ; Rouhani, S ; Sharif University of Technology
    2009
    Abstract
    Appreciation of stochastic Loewner evolution (SLEκ), as a powerful tool to check for conformal invariant properties of geometrical features of critical systems has been rising. In this paper we use this method to check conformal invariance in sandpile models. Avalanche frontiers in Abelian sandpile model are numerically shown to be conformally invariant and can be described by SLE with diffusivity κ=2. This value is the same as value obtained for loop-erased random walks. The fractal dimension and Schramm's formula for left passage probability also suggest the same result. We also check the same properties for Zhang's sandpile model. © 2009 The American Physical Society  

    Controlling cost in sandpile models through local adjustment of drive

    , Article Physica A: Statistical Mechanics and its Applications ; Volume 534 , 2019 ; 03784371 (ISSN) Parsaeifard, B ; Moghimi Araghi, S ; Sharif University of Technology
    Elsevier B.V  2019
    Abstract
    In this paper we consider sandpile models and modify the drive mechanisms to control the size of avalanches. The modification to the drive mechanism is local. We have studied the scaling behavior of the BTW and Manna models. We have found that the BTW model is more sensitive to the modification than the Manna model. Furthermore we have assigned a cost function to each avalanche and have found an optimum value for the modification to arrive at the lowest cost © 2019  

    Modeling and quantification of power system resilience to natural hazards: a case of landslide

    , Article IEEE Access ; Volume 9 , 2021 , Pages 80300-80309 ; 21693536 (ISSN) Ghorani, R ; Fattaheian-Dehkordi, S ; Farrokhi, M ; Fotuhi Firuzabad, M ; Lehtonen, M ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2021
    Abstract
    Power systems are stretched across thousands of miles of diverse territories, often in remote locations, to generate and transfer the energy to geographically dispersed customers. The system is therefore subjected to a wide range of natural hazards which could potentially damage critical system components and cause interruption of electricity supply in some areas. To improve system resilience against natural hazards, management frameworks are required to identify hazardous areas and prioritize reinforcement activities in order to take the most out of the limited resources.Landslide is a natural disaster that involves the breakup and downhill flow of rock, mud, water, and anything caught in... 

    A composition function model for software reconfiguration propagation in a network of systems

    , Article 9th World Multi-Conference on Systemics, Cybernetics and Informatics, WMSCI 2005, Orlando, FL, 10 July 2005 through 13 July 2005 ; Volume 2 , 2005 , Pages 83-88 ; 980656054X (ISBN); 9789806560543 (ISBN) Asadzadeh Manjili, K ; Niamanesh, M ; Jalili, R ; Sharif University of Technology
    2005
    Abstract
    Reconfigurability in software has many advantages such as updating, bug fixing and adding new services. Dynamic reconfiguration is more useful for mission critical systems that need to change in run time. Reconfiguration of a system in network may result to reconfiguring its dependent systems, which we call reconfiguration propagation. In this paper, we present a model for reconfiguration propagation for systems in a network  

    Online peak power and maximum temperature management in multi-core mixed-criticality embedded systems

    , Article 22nd Euromicro Conference on Digital System Design, DSD 2019, 28 August 2019 through 30 August 2019 ; 2019 , Pages 546-553 ; 9781728128610 (ISBN) Ranjbar, B ; Nguyen, T. D. A ; Ejlali, A ; Kumar, A ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2019
    Abstract
    In this work, we address peak power and maximum temperature in multi-core Mixed-Criticality (MC) systems. In these systems, a rise in peak power consumption may generate more heat beyond the cooling capacity. Additionally, the reliability and timeliness of MC systems may be affected due to excessive temperature. Therefore, managing peak power consumption has become imperative in multi-core MC systems. In this regard, we propose an online peak power management heuristic for multi-core MC systems. This heuristic reduces the peak power consumption of the system as much as possible during runtime by exploiting dynamic slack and Dynamic Voltage and Frequency Scaling (DVFS). Specifically, our... 

    LESS-MICS: A low energy standby-sparing scheme for mixed-criticality systems

    , Article IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ; Volume 39, Issue 12 , 2020 , Pages 4601-4610 Safari, S ; Hessabi, S ; Ershadi, G ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2020
    Abstract
    Multicore platforms are becoming the dominant trend in mixed-criticality systems (MCSs). Multicores provide great opportunities to realize task-level redundancy for reliability enhancement. However, they may experience limited utility in battery-powered mixed-criticality embedded systems. Hence, joint energy and reliability management is a crucial issue in designing MCSs. In this article, we propose the low energy standby-sparing mechanism in mixed-criticality system (LESS-MICS) scheme, which uses the inherent redundancy of multicores to apply the standby-sparing technique for fault-tolerance. Also, by using the inherent redundancy, the LESS-MICS scheme proposes the Parallelism and Reduction... 

    PVMC: Task mapping and scheduling under process variation heterogeneity in mixed-criticality systems

    , Article IEEE Transactions on Emerging Topics in Computing ; Volume 10, Issue 2 , 2022 , Pages 1166-1177 ; 21686750 (ISSN) Bahrami, F ; Ranjbar, B ; Rohbani, N ; Ejlali, A ; Sharif University of Technology
    IEEE Computer Society  2022
    Abstract
    Embedded Systems (ESs) have migrated from special-purpose hardware to commodity hardware. These systems have also tended to Mixed-Criticality (MC) implementations, executing applications of different criticalities upon a shared platform. Multi-cores, which are commonly used to design MC Systems (MCSs), bring out new challenges due to the Process Variation (PV). Power and frequency asymmetry affects the predictability of ESs. In this work, variation-aware techniques are explored to not only improve the reliability of MCSs, but also aid the scheduling and energy saving of them. We leverage the Core-to-Core (C2C) variations to protect high-criticality tasks and provide full service for a high... 

    Tolerating permanent faults with low-energy overhead in multicore mixed-criticality systems

    , Article IEEE Transactions on Emerging Topics in Computing ; Volume 10, Issue 2 , 2022 , Pages 985-996 ; 21686750 (ISSN) Naghavi, A ; Safari, S ; Hessabi, S ; Sharif University of Technology
    IEEE Computer Society  2022
    Abstract
    Due to the battery-operated nature of some embedded Mixed-Criticality Systems, simultaneous energy and reliability management is a crucial issue in designing these systems. We propose two comprehensive schemes, MC-2S and MC-4S, which exploit the standby-sparing technique to tolerate permanent faults through inherent redundancy of multicore systems and maintain the system's reliability against transient faults with low energy overhead. In these schemes, two copies of each high-criticality task are scheduled on different cores to guarantee their timeliness in case of permanent fault occurrence. To guarantee the quality of service of low-criticality tasks, in the MC-2S scheme, one backup copy... 

    Improving hardware Trojan detection using scan chain based ring oscillators

    , Article Microprocessors and Microsystems ; Volume 63 , 2018 , Pages 55-65 ; 01419331 (ISSN) Asadi Kouhanjani, M. R ; Jahangir, A. H ; Sharif University of Technology
    Elsevier B.V  2018
    Abstract
    In recent years, the security of integrated circuits (ICs) has received more attention as usage of ICs made by untrustworthy foundries has increased in safety-critical systems [1]. In this paper, we introduce a novel approach for fingerprinting the delay of functional paths in a sequential circuit that have millions of transistors, like processors. We present a method for inserting Ring Oscillators (ROs) into scan chain for measuring the delay of each functional path inside the chip. Using the proposed method, the payload part of Trojans will be detected according to their size and cell types. Our method can be used by power-based Trojan detection approaches for finding the trigger part of... 

    High performance and predictable memory controller for multicore mixed-criticality real-time systems

    , Article IET Computers and Digital Techniques ; Volume 13, Issue 5 , 2019 ; 17518601 (ISSN) Dabaghi, A ; Farbeh, H ; Sharif University of Technology
    Institution of Engineering and Technology  2019
    Abstract
    Multicore processors are widely used in today's real-time embedded systems to satisfy the performance and predictability requirements as well as reduce cost. A vast majority of multicore embedded systems are running several tasks with mixed-criticality, in which the non-functional requirements of the tasks are different or even conflicting. A major challenge in mixed-criticality systems is to maximise the efficiency of shared resources while satisfying the criticality requirements. Shared memory is a key component that should be well managed and memory controller plays the main role in this case. Several memory controllers have been introduced in the literature for multicore processors. In... 

    PLCDefender: Improving remote attestation techniques for PLCs using physical model

    , Article IEEE Internet of Things Journal ; 2020 Salehi, M ; Bayat Sarmadi, S ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2020
    Abstract
    In order to guarantee the security of industrial control system (ICS) processes, the proper functioning of the programmable logic controllers (PLCs) must be ensured. In particular, cyber-attacks can manipulate the PLC control logic program and cause terrible damage that jeopardize people’s life when bringing the state of the critical system into an unreliable state. Unfortunately, no remote attestation technique has yet been proposed that can validate the PLC control logic program using a physics-based model that demonstrates device behavior. In this paper, we propose PLCDefender, a mitigation method that combines hybrid remote attestation technique with a physics-based model to preserve the... 

    PVMC: task mapping and scheduling under process variation heterogeneity in mixed-criticality systems

    , Article IEEE Transactions on Emerging Topics in Computing ; 2021 ; 21686750 (ISSN) Bahrami, F ; Ranjbar, B ; Rohbani, N ; Ejlali, A. R ; Sharif University of Technology
    IEEE Computer Society  2021
    Abstract
    Embedded systems have migrated from special-purpose hardware to commodity hardware. These systems have also tended to Mixed-Criticality (MC) implementations, executing applications of different criticalities upon a shared platform. Multi-core processors, which are commonly used to design MC systems, bring out new challenges due to the process variations. Power and frequency asymmetry affects the predictability of embedded systems. In this work, variation-aware techniques are explored to not only improve the reliability of MC systems, but also aid the scheduling and energy saving of them. We leverage the core-to-core (C2C) variations to protect high-criticality tasks and provide full service... 

    Tolerating permanent faults with low-energy overhead in multicore mixed-criticality systems

    , Article IEEE Transactions on Emerging Topics in Computing ; 2021 ; 21686750 (ISSN) Naghavi, A ; Safari, S ; Hessabi, S ; Sharif University of Technology
    IEEE Computer Society  2021
    Abstract
    Due to the battery-operated nature of embedded Mixed-Criticality Systems, simultaneous energy and reliability management is a cru-cial issue in designing these systems. We propose two comprehensive schemes, MC-2S and MC-4S, which tolerate permanent faults through exploiting the inherent redundancy of multicore systems for applying standby-sparing technique and maintaining the system re-liability against transient faults with low energy overhead. In these schemes, two copies of each high-criticality task are scheduled on different cores to guarantee their timeliness in case of permanent fault occurrence. In order to guarantee the quality of service of low-criticality tasks, in the MC-2S... 

    Power-Aware runtime scheduler for mixed-criticality systems on multicore platform

    , Article IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ; Volume 40, Issue 10 , 2021 , Pages 2009-2023 ; 02780070 (ISSN) Ranjbar, B ; Nguyen, T. D. A ; Ejlali, A ; Kumar, A ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2021
    Abstract
    In modern multicore mixed-criticality (MC) systems, a rise in peak power consumption due to parallel execution of tasks with maximum frequency, specially in the overload situation, may lead to thermal issues, which may affect the reliability and timeliness of MC systems. Therefore, managing peak power consumption has become imperative in multicore MC systems. In this regard, we propose an online peak power and thermal management heuristic for multicore MC systems. This heuristic reduces the peak power consumption of the system as much as possible during runtime by exploiting dynamic slack and per-cluster dynamic voltage and frequency scaling (DVFS). Specifically, our approach examines... 

    Improving the timing behaviour of mixed-criticality systems using chebyshev's theorem

    , Article 2021 Design, Automation and Test in Europe Conference and Exhibition, DATE 2021, 1 February 2021 through 5 February 2021 ; Volume 2021-February , 2021 , Pages 264-269 ; 15301591 (ISSN); 9783981926354 (ISBN) Ranjbar, B ; Hoseinghorban, A ; Sahoo, S. S ; Ejlali, A ; Kumar, A ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2021
    Abstract
    In Mixed-Criticality (MC) systems, there are often multiple Worst-Case Execution Times (WCETs) for the same task, corresponding to system operation mode. Determining the appropriate WCETs for lower criticality modes is non-trivial; while on the one hand, a low WCET for a mode can improve the processor utilization in that mode, on the other hand, using a larger WCET ensures that the mode switches are minimized, thereby maximizing the quality-of-service for all tasks, albeit at the cost of processor utilization. Although there are many studies to determine WCET in the highest criticality mode, no analytical solutions are proposed to determine WCETs in other lower criticality modes. In this... 

    Toward the design of fault-tolerance-and peak-power-aware multi-core mixed-criticality systems

    , Article IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ; 2021 ; 02780070 (ISSN) Ranjbar, B ; Hosseinghorban, A ; Salehi, M ; Ejlali, A ; Kumar, A ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2021
    Abstract
    Mixed-Criticality (MC) systems have recently been devised to address the requirements of real-time systems in industrial applications, where the system runs tasks with different criticality levels on a single platform. In some workloads, a highcritically task might overrun and overload the system, or a fault can occur during the execution. However, these systems must be fault-tolerant and guarantee the correct execution of all highcriticality tasks by their deadlines to avoid catastrophic consequences, in any situation. Furthermore, in these MC systems, the peak power consumption of the system may increase, especially in an overload situation and exceed the processor Thermal Design Power... 

    Stretch: Exploiting service level degradation for energy management in mixed-criticality systems

    , Article CSI Symposium on Real-Time and Embedded Systems and Technologies, RTEST 2015, 7 October 2015 through 8 October 2015 ; October , 2015 , Page(s): 1 - 8 ; 9781467380478 (ISBN) Taherin, A ; Salehi, M ; Ejlali, A ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2015
    Abstract
    Mixed-criticality systems are introduced due to industrial interest to integrate different types of functionalities with varying importance into a common and shared computing platform. Low-energy consumption is vital in mixed-criticality systems due to their ever-increasing computation requirements and the fact that they are mostly supplied with batteries. In case when high-criticality tasks overrun in such systems, low-criticality tasks can be whether ignored or degraded to assure high-criticality tasks timeliness. We propose a novel energy management method (called Stretch), which lowers the energy consumption of mixed-criticality systems with the cost of degrading service level of... 

    Classification of activated faults in the flexray-based networks

    , Article Journal of Electronic Testing: Theory and Applications (JETTA) ; Volume 26, Issue 5 , October , 2010 , Pages 535-547 ; 09238174 (ISSN) Sedaghat, Y ; Miremadi, S. G ; Sharif University of Technology
    Abstract
    FlexRay communication protocol is expected to become the de-facto standard for distributed safety-critical systems. This paper classifies the effects of transient single bit-flip fault injections into the FlexRay communication controller. In this protocol, when an injected fault is activated, this may result in one or more error types, i.e.: Boundary violation, Conflict, Content, Freeze, Synchronization, Syntax, and Invalid frame. To study the activated faults, a FlexRay bus network, composed of four nodes, was modeled by Verilog HDL; and a total of 135,600 transient faults was injected in only one node, called the target node. The results show that only 9,342 of the faults (about 6.9%) were...