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    Optimal PMU placement by an equivalent linear formulation for exhaustive search

    , Article IEEE Transactions on Smart Grid ; Volume 3, Issue 1 , 2012 , Pages 174-182 ; 19493053 (ISSN) Azizi, S ; Dobakhshari, A. S ; Nezam Sarmadi, S. A ; Ranjbar, A. M ; Sharif University of Technology
    2012
    Abstract
    Observability of bulk power transmission network by means of minimum number of phasor measurement units (PMUs), with the aid of the network topology, is a great challenge. This paper presents a novel equivalent integer linear programming method (EILPM) for the exhaustive search-based PMU placement. The state estimation implemented based on such a placement is completely linear, thereby eliminating drawbacks of the conventional SCADA-based state estimation. Additional constraints for observability preservation following single PMU or line outages can easily be implemented in the proposed EILPM. Furthermore, the limitation of communication channels is dealt with by translation of nonlinear... 

    A sectionalizing method in power system restoration based on wide area measurement systems

    , Article EPEC 2010 - IEEE Electrical Power and Energy Conference: "Sustainable Energy for an Intelligent Grid", 25 August 2010 through 27 August 2010 ; August , 2010 ; 9781424481880 (ISBN) Nezam Sarmadi, S. A ; Salehi Dobakhshari, A ; Azizi, S ; Ranjbar, A. M ; Nouri Zadeh, S ; Sharif University of Technology
    2010
    Abstract
    This paper presents a novel sectionalizing method for the build-up strategy in power system restoration. Power system restoration is the procedure of restoring power system elements after a partial or a complete blackout. Because of its economic and political importance, different strategies have been developed for power system restoration. One of the most practical and economical is the build-up strategy that includes the process of restoring separated parts (islands) in the power system and interconnecting them afterwards. This paper intends to develop a systematic algorithm for sectionalizing a power system considering various constraints such as black-start capability of generators,... 

    An islanding algorithm to restore a PMU installed power system

    , Article Asia-Pacific Power and Energy Engineering Conference, APPEEC, 28 March 2010 through 31 March 2010 ; March , 2010 ; 21574839 (ISSN) ; 9781424448135 (ISBN) Nezam Sarmadi, S. A ; Nouri Zadeh, S ; Ranjbar, A. M ; Pishvaie, M. R ; Sharif University of Technology
    2010
    Abstract
    This paper is concerned about islanding of network and observability of these islands in power system restoration. It is assumed that a black out happened on a system which have minimum PMUs (phasor measurement units) for measuring network's parameters. To restore this system an algorithm of islanding that keeps all islands observable to make the restoration process shorter is introduced and developed step by step on the IEEE 14 bus system and it is applied to the New England 39 bus system to show the result for a bigger system  

    A power system build-up restoration method based on wide area measurement systems

    , Article European Transactions on Electrical Power ; Volume 21, Issue 1 , 2011 , Pages 712-720 ; 1430144X (ISSN) Nezam Sarmadi, S. A ; Nourizadeh, S ; Azizi, S ; Rahmat Samii, R ; Ranjbar, A. M ; Sharif University of Technology
    2011
    Abstract
    Power system restoration is the procedure of restoring a power system after a blackout and different strategies have developed for it because of its importance. One of the most practical and economical strategies is a "Build-up strategy" that includes the process of restoring separated islands in the power system and interconnecting them after it. The process of Build-up power system restoration is highly affected by power system telecommunication capabilities. Based on the constraints of wide area measurement system (WAMS) operation, each island must be fully observable. This paper provides an approach for power system restoration and observability of these islands. The New England 39 bus... 

    Optimal multi-stage PMU placement in electric power systems using Boolean algebra

    , Article International Transactions on Electrical Energy Systems ; Volume 24, Issue 4 , 2015 , Pages 562-577 ; 20507038 (ISSN) Azizi, S ; Salehi Dobakhshari, A ; Nezam Sarmadi, S. A ; Ranjbar, A. M ; Gharehpetian, G. B ; Sharif University of Technology
    John Wiley and Sons Ltd  2015
    Abstract
    Placement of phasor measurement units (PMUs) in power systems has often been formulated for achieving total network observability. In practice, however, the installation process is not implemented at once, but at several stages, because the number of available PMUs at each time period is restricted due to financial problems. This paper presents a novel integer linear programming framework for optimal multi-stage PMU placement (OMPP) over a preset schedule, in order to improve the network observability during intermediate stages, in addition to its complete observability by the end of the PMU placement process. To precisely evaluate the network observability and fully exploit the potential of... 

    A Sectionalizing Method in Power System Restoration Based on Wide Area Measurement Systems

    , M.Sc. Thesis Sharif University of Technology Nezam Sarmadi, Arash (Author) ; Ranjbar, Ali Mohammad (Supervisor)
    Abstract
    Power system restoration is the procedure of restoring generators, transmission lines and loads in a minimum time without damaging power system elements. There are different strategies to restore a power system after a blackout. The one that we will introduce here is the build-upward or parallel restoration strategy. In this method power system will be divided into some independent islands firstly and then the restoration process will begin in each island separately and at the same time. The islands then will be connected together to have a complete restored network. The significant advantage of this strategy is minimizing duration of restoration. On the other hand, the use of Wide Area... 

    Friction and wear performance of copper-graphite surface composites fabricated by friction stir processing (FSP)

    , Article Wear ; Volume 304, Issue 1-2 , 2013 , Pages 1-12 ; 00431648 (ISSN) Sarmadi, H ; Kokabi, A. H ; Seyed Reihani, S. M ; Sharif University of Technology
    2013
    Abstract
    Copper-graphite composites which have low friction coefficient can be used as bearing materials in lieu of materials containing lead which cause environmental problems. So far, some methods such as powder metallurgy and centrifugal casting have been employed to produce these composites. In this study, friction stir processing (FSP) was used to produce copper-graphite surface composites. Five tools with different pin profile were employed in order to achieve a comprehensive dispersion. Results show that the tool with triangular pin gives rise to a better dispersion of graphite particles. Furthermore, four copper-graphite composites containing different graphite content were prepared using... 

    FPGA-based protection scheme against hardware trojan horse insertion using dummy logic

    , Article IEEE Embedded Systems Letters ; Volume 7, Issue 2 , 2015 , Pages 46-50 ; 19430663 (ISSN) Khaleghi, B ; Ahari, A ; Asadi, H ; Bayat-Sarmadi, S ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2015
    Abstract
    Hardware trojan horses (HTH) have recently emerged as a major security threat for field-programmable gate arrays (FPGAs). Previous studies to protect FPGAs against HTHs may still leave a considerable amount of logic resources to be misused by malicious attacks. This letter presents a low-level HTH protection scheme for FPGAs by filling the unused resources with the proposed dummy logic. In the proposed scheme, we identify the unused resources at the device layout-level and offer dummy logic cells for different resources. The proposed HTH protection scheme has been applied on Xilinx Virtex devices implementing a set of IWLS benchmarks. The results show that by employing the proposed HTH... 

    Isogeny diffie-hellman and key encapsulation using a customized pipelined montgomery multiplier

    , Article IEEE Transactions on Circuits and Systems I: Regular Papers ; 2021 ; 15498328 (ISSN) Farzam, S. M. H ; Bayat-Sarmadi, S ; Mosanaei-Boorani, H ; Alivand, A ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2021
    Abstract
    We present a pipelined Montgomery multiplier tailored for SIKE primes. The latency of this multiplier is far shorter than that of the previous work while its frequency competes with the highest-rated ones. The implementation results on a Virtex-7 FPGA show that this multiplier improves the time, the area-time product (AT), and the throughput of computing modular multiplication by at least 2.30, 1.60, and 1.36 times over SIKE primes respectively. We have also developed a CPU-like architecture to perform SIDH and SIKE using several instances of our modular multiplier. Using four multipliers on a Virtex-7 FPGA, the encapsulation and the decapsulation of SIKE can be performed at least 1.45 times... 

    Fast supersingular isogeny diffie-hellman and key encapsulation using a customized pipelined montgomery multiplier

    , Article IEEE Transactions on Circuits and Systems I: Regular Papers ; Volume 69, Issue 3 , 2022 , Pages 1221-1230 ; 15498328 (ISSN) Farzam, S. M. H ; Bayat Sarmadi, S ; Mosanaei Boorani, H ; Alivand, A ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2022
    Abstract
    We present a pipelined Montgomery multiplier tailored for SIKE primes. The latency of this multiplier is far shorter than that of the previous work while its frequency competes with the highest-rated ones. The implementation results on a Virtex-7 FPGA show that this multiplier improves the time, the area-time product (AT), and the throughput of computing modular multiplication by at least 2.30, 1.60, and 1.36 times over SIKE primes respectively. We have also developed a CPU-like architecture to perform SIDH and SIKE using several instances of our modular multiplier. Using four multipliers on a Virtex-7 FPGA, the encapsulation and the decapsulation of SIKE can be performed at least 1.45 times... 

    Efficient hardware implementations of legendre symbol suitable for mpc applications

    , Article IEEE Transactions on Circuits and Systems I: Regular Papers ; 2021 ; 15498328 (ISSN) Taheri, F ; Bayat Sarmadi, S ; Ebrahimi, S ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2021
    Abstract
    Multi-party computation (MPC) allows each peer to take part in the execution of a common function with their private share of data without the need to expose it to other participants. The Legendre symbol is a pseudo-random function (PRF) that is suitable for MPC protocols due to their efficient evaluation process compared to other symmetric primitives. Recently, Legendre-based PRFs have also been employed in the construction of a post-quantum signature scheme, namely LegRoast. In this paper, we propose, to the best of our knowledge, the first hardware implementations for the Legendre symbol by three approaches: 1) low-area, 2) high-speed, and 3) high-frequency. The high-speed architecture... 

    High-Speed post-quantum cryptoprocessor based on RISC-V architecture for IoT

    , Article IEEE Internet of Things Journal ; Volume 9, Issue 17 , 2022 , Pages 15839-15846 ; 23274662 (ISSN) Hadayeghparast, S ; Bayat Sarmadi, S ; Ebrahimi, S ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2022
    Abstract
    Public-key plays a significant role in today's communication over the network. However, current state-of-the-art public-key encryption (PKE) schemes are too complex to be efficiently employed in resource-constrained devices. Moreover, they are vulnerable to quantum attacks and soon will not have the required security. In the last decade, lattice-based cryptography has been a progenitor platform of the post-quantum cryptography (PQC) due to its lower complexity, which makes it more suitable for Internet of Things applications. In this article, we propose an efficient implementation of the binary learning with errors over ring (Ring-BinLWE) on the reduced instruction set computer-five (RISC-V)... 

    Efficient hardware implementations of legendre symbol suitable for Mpc applications

    , Article IEEE Transactions on Circuits and Systems I: Regular Papers ; Volume 69, Issue 3 , 2022 , Pages 1231-1239 ; 15498328 (ISSN) Taheri, F ; Bayat Sarmadi, S ; Ebrahimi, S ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2022
    Abstract
    Multi-party computation (MPC) allows each peer to take part in the execution of a common function with their private share of data without the need to expose it to other participants. The Legendre symbol is a pseudo-random function (PRF) that is suitable for MPC protocols due to their efficient evaluation process compared to other symmetric primitives. Recently, Legendre-based PRFs have also been employed in the construction of a post-quantum signature scheme, namely LegRoast. In this paper, we propose, to the best of our knowledge, the first hardware implementations for the Legendre symbol by three approaches: 1) low-area, 2) high-speed, and 3) high-frequency. The high-speed architecture... 

    RISC-HD: lightweight risc-v processor for efficient hyperdimensional computing inference

    , Article IEEE Internet of Things Journal ; Volume 9, Issue 23 , 2022 , Pages 24030-24037 ; 23274662 (ISSN) Taheri, F ; Bayat Sarmadi, S ; Hadayeghparast, S ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2022
    Abstract
    Hyperdimensional (HD) computing is a lightweight machine learning method widely used in Internet of Things applications for classification tasks. Although many hardware accelerators are proposed to improve the performance of HD, they suffer from low flexibility that makes them not practical in most real-life scenarios. To improve the flexibility, an open-source instruction set architecture (ISA) called RISC-V has been employed and extended for a specific application such as machine learning. This article aims to improve the efficiency and flexibility of HD computing for resource-constrained applications. To this end, we extend a RISC-V core (RI5CY) for HD computing called RISC-HD. First, to... 

    Power system restoration planning based on Wide Area Measurement System

    , Article International Journal of Electrical Power and Energy Systems ; Volume 43, Issue 1 , 2012 , Pages 526-530 ; 01420615 (ISSN) Nourizadeh, S ; Nezam Sarmadi, S. A ; Karimi, M. J ; Ranjbar, A. M ; Sharif University of Technology
    2012
    Abstract
    This paper presents a method for the optimal restoration planning based on Wide Area Measurement System (WAMS). This method uses observability analysis and Power Transfer Distribution Factor (PTDF) concept. The PTDF concept is applied to decrease the overvoltages caused by energizing transmission lines with lightly load. The New England 39 bus power system is used to demonstrate the proposed algorithm and verify the results. The outcomes of the study are evaluated to show the validity and reliability of the presented approach  

    An efficient low-latency point-multiplication over curve25519

    , Article IEEE Transactions on Circuits and Systems I: Regular Papers ; Volume 66, Issue 10 , 2019 , Pages 3854-3862 ; 15498328 (ISSN) Salarifard, R ; Bayat Sarmadi, S ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2019
    Abstract
    The elliptic curve cryptography (ECC) has gained attention mainly due to its lower complexity compared to other asymmetric methods while providing the same security level. The most performance critical operation in ECC is the point multiplication. Thus, its efficient implementation is desirable. One of the most secure and lightweight ECC curves, which satisfies all standard security criteria, is the Curve25519. In this paper, a low latency Karatsuba-Ofman-based field multiplier (KOM) and an efficient point multiplication over Curve25519 have been proposed. The improvements have been achieved mainly due to the proposed low latency pipelined KOM and efficient scheduling of field operations.... 

    Lightweight and DPA-resistant post-quantum cryptoprocessor based on binary ring-LWE

    , Article 20th International Symposium on Computer Architecture and Digital Systems, CADS 2020, 19 August 2020 through 20 August 2020 ; 2020 Ebrahimi, S ; Bayat Sarmadi, S ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2020
    Abstract
    With the exponential growth in the internet of things (IoT) applications such as smart city and e-health, more embedded devices and smart nodes are connected to the network. In order to provide security for such resource-constrained devices, different cryptographic schemes such as public key encryption (PKE) are required. However, considering the high complexity and vulnerability of classic PKE schemes against quantum attacks, it is necessary to consider other possible options. Recently, lattice-based cryptography and especially learning with errors (LWE) have gained high attention due to resistance against quantum attacks and relatively low-complexity operations. During the past decade,... 

    Lightweight and fault-resilient implementations of binary ring-lwe for iot devices

    , Article IEEE Internet of Things Journal ; Volume 7, Issue 8 , 2020 , Pages 6970-6978 Ebrahimi, S ; Bayat Sarmadi, S ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2020
    Abstract
    While the Internet of Things (IoT) shapes the future of the Internet, communications among nodes must be secured by employing cryptographic schemes such as public-key encryption (PKE). However, classic PKE schemes, such as RSA and elliptic curve cryptography (ECC) suffer from both high complexity and vulnerability to quantum attacks. During the past decade, post-quantum schemes based on the learning with errors (LWEs) problem have gained high attention due to the lower complexity among PKE schemes. In addition to resistance against theoretical (quantum and classic) attacks, every practical implementation of any cryptosystem must also be evaluated against different side-channel attacks such... 

    PLCDefender: Improving remote attestation techniques for PLCs using physical model

    , Article IEEE Internet of Things Journal ; 2020 Salehi, M ; Bayat Sarmadi, S ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2020
    Abstract
    In order to guarantee the security of industrial control system (ICS) processes, the proper functioning of the programmable logic controllers (PLCs) must be ensured. In particular, cyber-attacks can manipulate the PLC control logic program and cause terrible damage that jeopardize people’s life when bringing the state of the critical system into an unreliable state. Unfortunately, no remote attestation technique has yet been proposed that can validate the PLC control logic program using a physics-based model that demonstrates device behavior. In this paper, we propose PLCDefender, a mitigation method that combines hybrid remote attestation technique with a physics-based model to preserve the... 

    Lightweight fuzzy extractor based on LPN for device and biometric authentication in IoT

    , Article IEEE Internet of Things Journal ; Volume 8, Issue 13 , 2021 , Pages 10706-10713 ; 23274662 (ISSN) Ebrahimi, S ; Bayat Sarmadi, S ; Sharif University of Technology
    Institute of Electrical and Electronics Engineers Inc  2021
    Abstract
    User and device biometrics are proven to be a reliable source for authentication, especially for the Internet-of-Things (IoT) applications. One of the methods to employ biometric data in authentication are fuzzy extractors (FE) that can extract cryptographically secure and reproducible keys from noisy biometric sources with some entropy loss. It has been shown that one can reliably build an FE based on the learning parity with noise (LPN) problem with higher error-tolerance than previous FE schemes. However, the only available LPN-based FE implementation suffers from extreme resource demands that are not practical for IoT devices. This article proposes a lightweight hardware/software (HW/SW)...